EP2A15F672C9 vs EP2A15B724C9 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP2A15F672C9 sa pamamagitan ng Altera at EP2A15B724C9 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP2A15F672C9 EP2A15B724C9
Brand Altera Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete NRND
Logic Family APEX II (CMOS) —
Usable Gates 600 K —
Logic Elements 16640 16640
Macrocells 1664 —
Maximum User I/Os 492 —
Packhaging 672-ball FC-FBGA (27 x 27 mm, 1 mm pitch, FineLine) 724-ball FCBGA (Fine-pitch Chip-Scale BGA)
Process Technology 0.15 µm all-layer copper (up to 8 metal layers) 0.15 µm all-layer copper (up to 8 metal layers)
Core Supply Voltage 1.5 V —
I/O Supply Voltage 3.3 V —
Maximum Internal Frequency 379 MHz 500 MHz
Propagation Delay 1.94 ns —
High-Speed I/O Support True-LVDS, LVPECL, PCML, HyperTransport up to 1 Gbps —
Embedded Memory ESB dual-port RAM / FIFO —
Temperature na Operasyon 0 °C to 85 °C (commercial) Commercial (0 °C to +85 °C)
Configuration Interface Passive serial / Active serial / JTAG (IEEE 1149.1) —
PLLs On-chip PLLs for clock synthesis and deskew —
Compliance RoHS - [DATA_NEEDED: status not in verified data]; IEEE 1149.1 boundary scan —
Series — APEX II
Family — APEX II (EP2A15)
Number of Gates — 600000
Embedded Memory (RAM bits) — 425984
User I/O Count — 492
Supply Voltage (Core) — 1.5 V
I/O Voltages Supported — 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt I/O)
LVDS Data Rate — Up to 1 Gbps (True-LVDS)
Interface Standards — LVDS, LVPECL, PCML, HyperTransport
Embedded Memory Type — ESB - dual-port RAM / ROM / FIFO / CAM
Clock Management — On-chip PLLs
Uri ng Pagpapasok — Surface Mount
Tindminan RoHS — [DATA_NEEDED: RoHS status]

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