EP2A25F672I8 vs EP2A25F672I8N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2A25F672I8 sa pamamagitan ng Altera at EP2A25F672I8N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP2A25F672I8N - APEX II FPGA 900K Gates 672-BGA | Intel / Altera
EP2A25F672I8N ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP2A25F672I8 | EP2A25F672I8N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Family | APEX II | APEX II |
| Logic Elements / Cells | 24,320 | — |
| Equivalent Gates | 900,000 | — |
| Embedded Memory (RAM bits) | 622,592 | — |
| User I/Os | 492 | 492 |
| Number of PLLs | 4 | — |
| Process Technology | 0.15 µm CMOS, up to 8 metal layers | 0.15 µm all-layer copper-metal |
| Core Supply Voltage | 1.5 V | — |
| Propagation Delay | 1.69 ns (typical) | 1.69 ns |
| Internal Performance | 333 MHz (per legacy datasheet) | — |
| LVDS / High-Speed I/O | Yes, up to 1 Gbps | — |
| Packhaging | 672-ball FC-FBGA (FineLine BGA), 27 × 27 mm, 1 mm pitch | 672-ball FC-FBGA (FineLine BGA) |
| Uri ng Pagpapasok | Surface Mount (BGA) | — |
| Temperature na Operasyon | –40 °C to +85 °C (industrial, 'I' grade) | 0 °C to 85 °C |
| Speed Grade | I8 (industrial, 8-speed-grade per APEX II ordering scheme) | — |
| JTAG / Boundary Scan | IEEE 1149.1 compliant | — |
| I/O Standards Supported | LVTTL, LVCMOS, SSTL, HSTL, LVDS, LVPECL, GTL+, PCI | True-LVDS, LVPECL, PCML, HyperTransport |
| Tindminan RoHS | unknown | unknown |
| Lead-Free Status | unknown | — |
| Device | — | EP2A25 |
| Logic Elements | — | 24,320 |
| Gates | — | 900,000 |
| Embedded Memory (bits) | — | 622,592 |
| Package Size | — | 27 x 27 mm |
| Ball Pitch | — | 1 mm |
| Metal Layers | — | Up to 8 |
| Core Voltage (VCCINT) | — | 1.5 V |
| Internal Frequency (max) | — | 333 MHz |
| Logic Family | — | CMOS |
| Configuration Method | — | SRAM-based (Altera Quartus II) |
| Lead-Free | — | unknown |