EP2A25F672I8N vs EP2A25F672I7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2A25F672I8N sa pamamagitan ng Intel at EP2A25F672I7N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP2A25F672I8N - APEX II FPGA 900K Gates 672-BGA | Intel / Altera
EP2A25F672I8N ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP2A25F672I8N | EP2A25F672I7N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | NRND |
| Family | APEX II | APEX II |
| Device | EP2A25 | — |
| Logic Elements | 24,320 | — |
| Gates | 900,000 | — |
| Embedded Memory (bits) | 622,592 | — |
| User I/Os | 492 | — |
| Packhaging | 672-ball FC-FBGA (FineLine BGA) | 672-ball FC-FBGA |
| Package Size | 27 x 27 mm | — |
| Ball Pitch | 1 mm | — |
| Process Technology | 0.15 µm all-layer copper-metal | 0.15 µm CMOS |
| Metal Layers | Up to 8 | — |
| Core Voltage (VCCINT) | 1.5 V | — |
| Internal Frequency (max) | 333 MHz | — |
| Propagation Delay | 1.69 ns | — |
| Temperature na Operasyon | 0 °C to 85 °C | — |
| Logic Family | CMOS | — |
| I/O Standards Supported | True-LVDS, LVPECL, PCML, HyperTransport | — |
| Configuration Method | SRAM-based (Altera Quartus II) | — |
| Tindminan RoHS | unknown | [DATA_NEEDED: RoHS status] |
| Lead-Free | unknown | — |
| Logic Elements (Cells) | — | 24,320 |
| Typical Gate Count | — | 900,000 |
| Maximum Internal Frequency | — | 500 MHz |
| Core Supply Voltage | — | 1.5 V |
| Pin/Ball Count | — | 672 |
| Uri ng Pagpapasok | — | Surface Mount (BGA) |
| Operating Temperature Grade | — | Industrial (I) |
| Speed Grade | — | 7 |
| Configuration Interface | — | JTAG (IEEE 1149.1), Passive Serial, Fast Passive Parallel |
| Design Software | — | Quartus II |
| Katayuan ng Lifecycle | — | Not Recommended for New Designs (NRND) |