EP2A40B724C9 vs EP2A40F724 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2A40B724C9 sa pamamagitan ng Altera at EP2A40F724 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2A40B724C9 | EP2A40F724 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | APEX II | EP2A |
| Logic Elements (LE) | 38,400 | — |
| Embedded RAM Bits | 655,360 (approximately 655 Kbits / 80 Kbytes) | 655360 |
| Number of User I/O | 540 | — |
| Supply Voltage na Operasyon | 1.425 V to 1.575 V (core) | — |
| MultiVolt I/O Support | 1.5 V, 1.8 V, 2.5 V, 3.3 V | — |
| Packhaging / Kaso | 724-BBGA, FCBGA (Flip-Chip BGA) | — |
| Supplier Device Package | 724-BGA (35x35 mm) | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Temperature na Operasyon | 0C to +85C | 0C to +85C (commercial) |
| Shipping Medium | Tray | — |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Architecture | LUT-based with embedded memory blocks | — |
| Typical Core Power | [DATA_NEEDED: ICCDAT typical] | — |
| Family | — | APEX II |
| Logic Elements | — | 38400 |
| System Gates | — | 1,500,000 (typical) |
| Maximum User I/O | — | 498 |
| CAM Blocks | — | Yes |
| PLLs | — | 4 |
| Global Clock Networks | — | 16 |
| Core Voltage | — | 1.5 V |
| I/O Voltage Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Packhaging | — | 724-ball FineLine BGA (F724) |
| Process Technology | — | 0.15 µm CMOS |
| Programming Interface | — | JTAG (IEEE 1149.1) / Altera ByteBlaster |