EP2A40B724I-8 vs EP2A40B724I-9 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2A40B724I-8 sa pamamagitan ng Altera at EP2A40B724I-9 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2A40B724I-8 | EP2A40B724I-9 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | NRND |
| Family | APEX II | APEX II |
| Logic Elements (LEs) | 38,400 | — |
| Logic Array Blocks (LABs) | 3,840 | — |
| Embedded System RAM | 655,360 bits (655 Kbits) | — |
| Maximum User I/O | 540 | 540 (per EP2A40B724 family) |
| Packhaging | 724-ball FineLine BGA | 724-ball FCBGA / FineLine BGA |
| Package Code | HBGA / S-PBGA-B724 | B724 |
| Speed Grade | -8 | -9 (per APEX II speed bin) |
| Temperature na Operasyon | -40C to +100C (Industrial) | — |
| Core Supply Voltage | 1.5 V (1.425 V to 1.575 V) | — |
| I/O Banks | [DATA_NEEDED: I/O bank count] | — |
| PLLs | 4 | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: rohs status] |
| Configuration Mode | JTAG / passive serial / passive parallel | — |
| Process Node | [DATA_NEEDED: process technology] | — |
| Logic Elements | — | 40,000 (typical) |
| Logic Cells | — | 38400 |
| Embedded Memory Bits | — | 655360 |
| Temperature Grade | — | Industrial ('I' suffix) |
| Temperature ng Junction na Operasyon | — | -40 C to +100 C (industrial) |
| Peak Reflow Temperature | — | 220 C |
| Core Voltage | — | 1.5 V (typical APEX II) |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, SSTL |
| Configuration Interface | — | JTAG, Passive Serial |
| PLL | — | On-chip (per APEX II architecture) |
| Level ng MSL | — | [DATA_NEEDED: msl level] |