EP2A40B724I8N vs EP2A40F1020I8N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2A40B724I8N sa pamamagitan ng Altera at EP2A40F1020I8N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2A40B724I8N | EP2A40F1020I8N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | APEX II (EP2A40) | — |
| Device Family | APEX II Field Programmable Gate Array | — |
| Manufacturer | Altera (now Intel PSG) | — |
| Logic Cells / Elements | 38,400 | — |
| System Gates | 1,500,000 (1.5 M) | 1.5 M (typical) |
| Maximum User I/O | 536 | — |
| Terminal Count (Package Pins/Balls) | 724 | — |
| Package Type | FCBGA (Fine-pitch Chip-Scale BGA) | — |
| Process Technology | 0.15 µm CMOS | 0.15 um CMOS |
| Core Supply Voltage (VCCINT) | 1.5 V | — |
| Maximum Supply Voltage | 1.575 V | — |
| Embedded Memory (RAM bits) | 655,360 (655 Kbit) | — |
| Number of LABs/ESBs | 540 | — |
| Macrocells | 16 (PLA-type grouping) | — |
| Propagation Delay (tpd) | 1.7 - 1.78 ns | — |
| Maximum Internal Clock Frequency | 376 MHz | — |
| Configuration Mode | PS / AS / JTAG | — |
| Operating Temperature Grade | Industrial (-40C to +85C) | Industrial (-40 C to +100 C) / 'I' suffix |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Lifecycle | Obsolete / NRND (Altera APEX II family) | — |
| Family | — | APEX II (EP2A40) |
| Logic Elements | — | 38,400 cells |
| Core Voltage | — | 1.5 V |
| Maximum Internal Frequency | — | 376 MHz |
| User I/O Count | — | 735 (maximum) |
| Packhaging | — | 1020-pin FC-FBGA (Flip-Chip Fine-pitch BGA) |
| Speed Grade | — | 8 |
| Architecture | — | LUT-based with embedded system blocks (ESBs) |
| Configuration | — | SRAM-based, JTAG / passive serial / passive parallel |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Number of PLLs | — | [DATA_NEEDED: PLL count] |
| Total Embedded Memory | — | [DATA_NEEDED: embedded memory bits] |