EP2A40F1020C7ES vs EP2A40F1020C7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2A40F1020C7ES sa pamamagitan ng Intel at EP2A40F1020C7 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2A40F1020C7ES | EP2A40F1020C7 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX II | APEX II |
| Logic Elements | 38,400 | — |
| Typical Gates | 1,500,000 | — |
| Embedded Memory | 655,360 bits | — |
| Maximum User I/O | 735 | — |
| Maximum Frequency | 562 MHz | — |
| Process Technology | 0.15 µm CMOS, all-layer copper, up to 8 metal layers | 0.15 um CMOS, all-layer copper (up to 8 metal layers) |
| Core Voltage | 1.5 V | 1.5 V |
| Packhaging | 1020-pin FC-FBGA | 1020-ball FC-FBGA (Fine-pitch Chip-Scale BGA) |
| Speed Grade | C7 (with ES enhanced speed suffix) | — |
| High-Speed Interface | 1 Gbps True-LVDS, LVPECL, PCML, HyperTransport | — |
| Temperature na Operasyon | [DATA_NEEDED: commercial/industrial grade] | — |
| I/O Standards | LVTTL, LVCMOS, LVDS, LVPECL, PCML, HyperTransport, 1.5/1.8/2.5/3.3 V | — |
| PLLs | Up to 8 (per datasheet family feature) | — |
| Tindminan RoHS | [DATA_NEEDED] | [DATA_NEEDED: RoHS compliance status] |
| Programming Interface | JTAG (IEEE 1149.1), passive serial | — |
| Uri ng Pagpapasok | Surface Mount (FC-FBGA) | Surface Mount |
| Logic Elements / Cells | — | 38,400 |
| System Gates | — | 1.5 M |
| Macro Cells | — | 2,560 |
| User I/Os | — | 735 |
| Embedded Memory Bits | — | 655,360 bits |
| Maximum Internal Frequency | — | 562 MHz |
| High-Speed Interface Support | — | 1 Gbps True-LVDS, LVPECL, PCML, HyperTransport |
| Operating Temperature Grade | — | Industrial / per part suffix (C7) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |