EP2A40F1020C8N vs EP2A40F1020C6 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2A40F1020C8N sa pamamagitan ng Intel at EP2A40F1020C6 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2A40F1020C8N | EP2A40F1020C6 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Product Type | Field-Programmable Gate Array (FPGA) | — |
| Device Family | APEX II | — |
| Logic Technology | CMOS | — |
| Logic Gates | 1.5 million | — |
| Logic Cells | 38,400 | — |
| Nominal Supply Voltage | 1.5 V | — |
| Supply Voltage Range | 1.425 V to 1.575 V | — |
| User I/Os | 735 | — |
| Package Terminal Count | 1,020 pins | — |
| Package Type | FC-FBGA, BGA-1020 | — |
| Package Body Size | 33 mm x 33 mm | — |
| Ball Pitch | 1 mm | — |
| Reported Operating Frequency | 376 MHz | — |
| Alternative Reported Frequency | 562 MHz | — |
| Reported Propagation Delay | 1.78 ns | — |
| Alternative Reported Propagation Delay | 1.55 ns | — |
| Fabrication Process | 0.15 µm | — |
| Maximum Reported Metal Layers | 8 layers | — |
| Temperature na Operasyon | 0 °C to 85 °C | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Terminal Form | Ball | — |
| Tindminan RoHS | unknown | [DATA_NEEDED: RoHS status] |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | unknown | — |
| Family | — | APEX II |
| Maximum System Gates | — | 1,600,000 |
| Typical Gates | — | 40,000 |
| Logic Elements | — | [DATA_NEEDED: exact LE count] |
| Embedded System Bits | — | 655,360 bits |
| Maximum User I/O Pins | — | [DATA_NEEDED: max user I/O] |
| Number of PLLs | — | 4 |
| Core Supply Voltage | — | 1.8 V |
| MultiVolt I/O Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V |
| Packhaging | — | FBGA-1020 |
| Process Technology | — | 0.15 µm CMOS |
| Configuration Interface | — | Passive Serial, Passive Parallel, Passive Asynchronous, JTAG (IEEE 1149.1) |
| In-System Programmability | — | Yes |
| Operating Temperature Grade | — | Commercial (0C to +85C) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |