EP2A40F1020C9N vs EP2A40B724C9N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2A40F1020C9N sa pamamagitan ng Intel at EP2A40B724C9N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2A40F1020C9N | EP2A40B724C9N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX II | APEX II |
| Series | EP2A40 | EP2A40 |
| Device Type | FPGA (Field-Programmable Gate Array) | FPGA (Field-Programmable Gate Array) |
| Logic Family | CMOS | — |
| System Gates | 1.5 M | 1,500,000 |
| Logic Cells / Elements | 38,400 | — |
| Maximum Operating Frequency | 366 MHz | — |
| Propagation Delay | 1.55 ns | 2.05 ns |
| Core Voltage | 1.5 V | — |
| Process Technology | 0.15 µm all-layer copper (up to 8 metal layers) | 0.15 µm CMOS |
| User I/O Pins | 735 | — |
| Total Pins | 1020 | — |
| Packhaging | 1020-ball FC-FBGA, 33 × 33 mm, 1 mm pitch, FineLine | 724-ball FCBGA (Fine-pitch Chip-Scale BGA) |
| Temperature na Operasyon | 0 °C to 85 °C | — |
| I/O Standards | True-LVDS, LVPECL, PCML, HyperTransport, LVTTL, LVCMOS, PCI, GTL+, SSTL | — |
| Configuration Modes | Passive Serial, Passive Parallel, JTAG | — |
| On-chip Memory | Embedded System Blocks (ESB) for RAM/ROM | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Tindminan RoHS | unknown | — |
| Logic Elements / Cells | — | 38,400 |
| Maximum Frequency | — | 366 MHz |
| Core Supply Voltage | — | 1.5 V |
| User I/O Count | — | 536 |
| Terminal Pitch | — | 1.270 mm |
| Number of Terminals | — | 724 |
| Terminal Form | — | Ball |
| Output Function | — | Macrocells |
| Operating Temperature Grade | — | Industrial (OTHER / per datasheet) |