EP2A40F1020I7N vs EP2A40F1020C9N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2A40F1020I7N sa pamamagitan ng Intel at EP2A40F1020C9N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2A40F1020I7N | EP2A40F1020C9N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX II | APEX II |
| Device Logic Elements | 38,400 cells | — |
| System Gates | 1,500,000 | 1.5 M |
| Maximum Operating Frequency | 562 MHz | 366 MHz |
| Process Technology | 0.15 µm | 0.15 µm all-layer copper (up to 8 metal layers) |
| Core Voltage | 1.5 V | 1.5 V |
| Packhaging | 1020-pin FC-FBGA | 1020-ball FC-FBGA, 33 × 33 mm, 1 mm pitch, FineLine |
| Temperature na Operasyon | -40C to +100C (Industrial) | 0 °C to 85 °C |
| Speed Grade | I7 | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Architecture | PLA-type / Look-up Table hybrid | — |
| Number of PLLs | [DATA_NEEDED: PLL count] | — |
| Embedded Memory | [DATA_NEEDED: total embedded memory bits] | — |
| User I/O Pins | [DATA_NEEDED: user I/O pin count] | 735 |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | unknown |
| Design Software | Quartus II | — |
| Series | — | EP2A40 |
| Device Type | — | FPGA (Field-Programmable Gate Array) |
| Logic Family | — | CMOS |
| Logic Cells / Elements | — | 38,400 |
| Propagation Delay | — | 1.55 ns |
| Total Pins | — | 1020 |
| I/O Standards | — | True-LVDS, LVPECL, PCML, HyperTransport, LVTTL, LVCMOS, PCI, GTL+, SSTL |
| Configuration Modes | — | Passive Serial, Passive Parallel, JTAG |
| On-chip Memory | — | Embedded System Blocks (ESB) for RAM/ROM |