EP2A40F672C7ES vs EP2A40F672C7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2A40F672C7ES sa pamamagitan ng Intel at EP2A40F672C7 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2A40F672C7ES | EP2A40F672C7 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX II | APEX II |
| Logic Elements | 38400 | 38,400 |
| Typical Gates | 1.5 M | — |
| Maximum Logic Elements | 40960 | — |
| Maximum Macro Cells | 2560 | — |
| Maximum User I/O | 492 | 492 |
| Maximum Operating Frequency | 562 MHz | — |
| Process Technology | 0.15 µm CMOS | 0.15 µm CMOS, all-layer copper, up to 8 metal layers |
| Core Voltage (VCCINT) | 1.5 V | — |
| I/O Voltage (VCCIO) | 3.3 V | — |
| Packhaging | 672-pin FC-FBGA (FineLine BGA) | 672-ball FC-FBGA (FineLine BGA) |
| Package Dimensions | 27 × 27 mm | 27 x 27 mm, 1.0 mm pitch |
| Ball Pitch | 1.0 mm | — |
| Speed Grade | 7 | — |
| Temperature na Operasyon | 0 °C to +85 °C (commercial) | — |
| Status Code | ES (Engineering Sample) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | [DATA_NEEDED: rohs status] | Compliant |
| System Gates | — | 1,500,000 |
| Macro Cells | — | 2,560 |
| Core Voltage | — | 1.5 V |
| I/O Voltage Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| Pin-to-Pin Delay | — | 1.55 ns (C7 speed grade) |
| Maximum Internal Frequency | — | 562 MHz |
| High-Speed Interface | — | 1 Gbps True-LVDS, LVPECL, PCML, HyperTransport |
| PLLs | — | 4 |
| Operating Temperature Grade | — | Commercial (per 'C' suffix in speed grade) |
| Lead-Free | — | Yes |