EP2A40F672C7N vs EP2A40F672C9ES Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2A40F672C7N sa pamamagitan ng Intel at EP2A40F672C9ES sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2A40F672C7N | EP2A40F672C9ES |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | NRND |
| Family | APEX II | APEX II |
| Logic Elements / Cells | 38,400 | — |
| System Gates | 1.5 M | 1,500,000 |
| Maximum User I/Os | 492 | — |
| Propagation Delay (tpd) | 1.55 ns | — |
| Internal Performance | 562 MHz | — |
| Process Technology | 0.15 µm CMOS, all-layer copper, up to 8 metal layers | 0.15 µm CMOS |
| Core Voltage | 1.5 V | 1.5 V |
| MultiVolt I/O Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V | — |
| Logic Family | CMOS | — |
| Packhaging | 672-ball FC-FBGA (FineLine BGA), S-PBGA-B672, 27 x 27 mm, 1.0 mm pitch | 672-pin FC-FBGA |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Temperature na Operasyon | 0 °C to 85 °C (commercial, 'C' grade) | — |
| Speed Grade | 7 | -9 |
| Lead-Free / RoHS | Yes (N suffix) | — |
| Configuration Modes | Passive Serial, Passive Parallel, JTAG | PS, PPS, PPA, JTAG, FPP |
| Logic Elements | — | 38,400 |
| Maximum User I/O | — | 492 |
| Operating Frequency (max) | — | 366 MHz |
| Embedded Memory (ESB) | — | Yes (RAM/ROM/CAM) |
| I/O Standards | — | LVTTL, LVCMOS, PCI, SSTL, HSTL, GTL+ |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |
| Tindminan RoHS | — | unknown |