EP2A40F672C9ES vs EP2A40F672C8N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2A40F672C9ES sa pamamagitan ng Altera at EP2A40F672C8N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2A40F672C9ES | EP2A40F672C8N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | APEX II | APEX II |
| Logic Elements | 38,400 | — |
| System Gates | 1,500,000 | 1.5 M |
| Maximum User I/O | 492 | — |
| Operating Frequency (max) | 366 MHz | — |
| Process Technology | 0.15 µm CMOS | — |
| Core Voltage | 1.5 V | — |
| Packhaging | 672-pin FC-FBGA | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | — |
| Speed Grade | -9 | C8 |
| Configuration Modes | PS, PPS, PPA, JTAG, FPP | — |
| Embedded Memory (ESB) | Yes (RAM/ROM/CAM) | — |
| I/O Standards | LVTTL, LVCMOS, PCI, SSTL, HSTL, GTL+ | — |
| Boundary Scan | IEEE 1149.1 (JTAG) | — |
| Tindminan RoHS | unknown | [DATA_NEEDED: RoHS status] |
| Series | — | EP2A40 |
| Logic Family | — | CMOS |
| Logic Elements / Cells | — | 38,400 |
| Maximum Operating Frequency | — | 376 MHz |
| Propagation Delay | — | 1.55 ns |
| Technology Node | — | 0.15 µm |
| Process Feature | — | All-layer copper, up to 8 metal layers |
| Nominal Supply Voltage (VCCINT) | — | 1.5 V |
| Supply Voltage Range | — | 1.425 V to 1.575 V |
| User I/Os | — | 492 |
| Number of Pins / Balls | — | 672 |
| Package Type | — | FC-FBGA (FineLine BGA) |
| Package Dimensions | — | 27 x 27 mm |
| Ball Pitch | — | 1.0 mm |
| LVDS Data Rate | — | 1 Gbps |
| Embedded PLLs | — | 4 |
| Programming Interface | — | JTAG (IEEE 1149.1) |
| Operating Temperature (Commercial) | — | 0 °C to 85 °C |