EP2A40F672C9N vs EP2A40F672C9 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2A40F672C9N sa pamamagitan ng Intel at EP2A40F672C9 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP2A40F672C9 - APEX II FPGA 1.5M Gates 38400 Cells 672-BGA | Altera
EP2A40F672C9 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP2A40F672C9N | EP2A40F672C9 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Family | APEX II | APEX II |
| Device Name | EP2A40 | — |
| System Gates | 1,500,000 | 1.5 M |
| Logic Elements | 38,400 | — |
| User I/Os | 492 | 492 |
| Embedded RAM (ESB) | [DATA_NEEDED: ESB total RAM bits] | — |
| Packhaging | BGA-672 (27 x 27 mm, 1.0 mm pitch) | 672-BBGA, FC-FBGA (FineLine) |
| Package Code | FC-FBGA / PBGA672 | — |
| Speed Grade | C9 (~1.55 ns propagation delay) | — |
| Process Technology | 0.15 µm all-layer copper, up to 8 metal layers | 0.15 µm all-layer copper, up to 8 metal layers |
| Core Voltage | 1.5 V | 1.5 V |
| Internal Frequency | 366 MHz | — |
| LVDS Data Rate | 1 Gbps | — |
| Propagation Delay | 1.55 ns | 1.55 ns |
| Temperature na Operasyon | 0 °C to +85 °C (commercial) | 0 °C to 85 °C (commercial) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Logic Family | CMOS (SRAM-based configuration) | CMOS |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Device Family | — | APEX II PLD |
| Logic Elements / Cells | — | 38,400 |
| Macros | — | 2,560 |
| Bilang ng Pins | — | 672 |
| Package Size | — | 27 mm × 27 mm, 1 mm ball pitch |
| Internal Speed Grade | — | 366 MHz |
| I/O Standards Supported | — | True-LVDS, LVPECL, PCML, HyperTransport |