EP2A40F672I7N vs EP2A40F672I-7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2A40F672I7N sa pamamagitan ng Intel at EP2A40F672I-7 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2A40F672I7N | EP2A40F672I-7 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX II | APEX II |
| System Gates | 1.5 M | 1,500,000 |
| Logic Cells / Elements | 38,400 | — |
| Macrocells | 16 | — |
| Product Terms per Macrocell | 32 | — |
| Maximum Internal Frequency | 562 MHz | 562 MHz |
| Propagation Delay (PLA mode) | 1.55 ns | — |
| User I/O Lines | 492 | — |
| Core Voltage | 1.5 V | 1.5 V |
| Process Technology | 0.15 µm | 0.15 µm CMOS |
| Packhaging | 672-pin FC-FBGA | 672-pin FC-FBGA |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Temperature na Operasyon | -40 °C to +85 °C (Industrial) | -40°C to +85°C (Industrial) |
| Tindminan RoHS | Compliant (Pb-free) | [DATA_NEEDED: RoHS compliance status] |
| Configuration Interface | JTAG, Passive Serial, Passive Parallel, Synchronous | — |
| Manufacturer | — | Intel (formerly Altera) |
| Logic Elements | — | 38,400 |
| Embedded System Blocks (ESBs) | — | [DATA_NEEDED: total ESB count] |
| Embedded Memory (bits) | — | [DATA_NEEDED: total embedded RAM bits] |
| Maximum User I/O | — | [DATA_NEEDED: maximum user I/O count] |
| Phase-Locked Loops (PLLs) | — | 4 |
| Speed Grade | — | -7 |
| Level ng Sensitivity sa Asid ng Moisture (MSL) | — | 3 |
| Peak Reflow Temperature | — | 220°C |
| Katayuan ng Lifecycle | — | Obsolete (EOL by Altera/Intel) |
| Programming Interface | — | JTAG (IEEE 1149.1) |