EP2A70B724C7ES vs EP2A70B724C8 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2A70B724C7ES sa pamamagitan ng Altera at EP2A70B724C8 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2A70B724C7ES | EP2A70B724C8 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | APEX II | APEX II |
| Typical Gates | 3,000,000 (3M) | — |
| Logic Elements (Cells) | 67,200 | — |
| Maximum Operating Frequency | 420 MHz | — |
| Process Technology | 0.15 µm | 0.15 µm SRAM |
| Core Voltage | 1.5 V | — |
| Packhaging | 724-pin FCBGA | 724-BBGA, FCBGA |
| User I/O Pins | 540 | — |
| Speed Grade | C7 | — |
| Temperature Grade | Commercial (C) | — |
| Uri ng Memory | Embedded System Block (ESB) | — |
| PLLs | Up to 8 | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Programming Interface | JTAG / ByteBlaster | — |
| Device Marking Suffix | ES (Engineering Sample) | — |
| Logic Elements | — | 67200 |
| Embedded Memory (RAM bits) | — | 1146880 |
| Maximum User I/Os | — | 540 |
| Ball Pitch | — | 1.27 mm |
| Supply Voltage - Core (VCCINT) | — | 1.5 V (typical APEX II value) |
| I/O Bank Voltage (VCCIO) | — | 1.8 V / 2.5 V / 3.3 V / 5 V MultiVolt |
| Number of PLLs | — | Up to 4 |
| Configuration Method | — | SRAM-based, serial/parallel via PROM |
| Temperature na Operasyon | — | [DATA_NEEDED: operating temperature grade] |
| True-LVDS Support | — | Yes |
| Number of ESBs (Embedded System Blocks) | — | [DATA_NEEDED: ESB count] |