EP2A70B724C7ES vs EP2A70B724C9 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2A70B724C7ES sa pamamagitan ng Altera at EP2A70B724C9 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2A70B724C7ES | EP2A70B724C9 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | APEX II | APEX II |
| Typical Gates | 3,000,000 (3M) | — |
| Logic Elements (Cells) | 67,200 | — |
| Maximum Operating Frequency | 420 MHz | — |
| Process Technology | 0.15 µm | 0.15 um all-layer copper (up to 8 metal layers) |
| Core Voltage | 1.5 V | — |
| Packhaging | 724-pin FCBGA | 724-BBGA, FCBGA (FineLine BGA) |
| User I/O Pins | 540 | — |
| Speed Grade | C7 | C9 (commercial, speed bin 9) |
| Temperature Grade | Commercial (C) | — |
| Uri ng Memory | Embedded System Block (ESB) | — |
| PLLs | Up to 8 | Up to 4 |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Level ng MSL | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL level] |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Non-compliant (per IC-Components listing) |
| Programming Interface | JTAG / ByteBlaster | — |
| Device Marking Suffix | ES (Engineering Sample) | — |
| Logic Elements | — | 67200 |
| Embedded Memory (bits) | — | 1146880 |
| User I/O Count | — | 540 |
| LVDS Channels | — | Up to 8 LVDS pairs at 1 Gbps |
| I/O Standards Supported | — | True-LVDS, LVPECL, PCML, HyperTransport |
| Embedded Memory Type | — | ESB (synchronous, self-timed WE, true dual-port / simple dual-port / single-port) |
| Temperature na Operasyon | — | 0C to +85C (commercial) |
| Supply Voltage (core) | — | 1.5 V |