EP2A70B724C7N vs EP2A70B724I7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2A70B724C7N sa pamamagitan ng Altera at EP2A70B724I7 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP2A70B724I7 - APEX II FPGA 3M Gates 67200 Cells 420MHz 1.5V 724-FCBGA | Intel
EP2A70B724I7 ObsoletePagsanggunian na paghahambing
| Parametro | EP2A70B724C7N | EP2A70B724I7 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX II (EP2A70) | APEX II |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| Technology | 0.15 µm CMOS | — |
| System Gates | 3,000,000 | — |
| Logic Cells / Logic Elements | 67,200 | — |
| Maximum Internal Frequency | 420 MHz | 420 MHz |
| Propagation Delay (typ.) | 2.17 ns | — |
| User I/O Pins | 536 | — |
| Macrocells (memory blocks reference) | 16 | — |
| Core Supply Voltage | 1.5 V nominal | — |
| I/O Supply Voltage | MultiVolt (1.5V / 1.8V / 2.5V / 3.3V / 5V tolerant) | — |
| Temperature na Operasyon | 0 °C to +85 °C (Commercial) | — |
| Packhaging | 724-pin FCBGA (Flip-Chip BGA) | 724-pin FCBGA (FineLine BGA) |
| Ball Pitch | 1.27 mm | — |
| Seated Height | 3.5 mm | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Configuration Method | JTAG, Passive Serial (PS), Fast Passive Parallel (FPP) | — |
| PLL Count | [DATA_NEEDED: PLL count] | — |
| Embedded Memory | Embedded System Blocks (ESBs) - dual-port RAM / ROM / CAM | [DATA_NEEDED: ESB bits - 429 Kb or similar] |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: not stated in provided data] |
| Manufacturer | — | Intel (formerly Altera) |
| Logic Elements | — | 67200 |
| Maximum System Gates | — | 3 M |
| Maximum User I/O Pins | — | approximately 422 (724-pin FCBGA) |
| Process Technology | — | 0.15 um CMOS |
| Core Voltage (VCCINT) | — | 1.5 V |
| I/O Voltages Supported | — | 1.5 V, 1.8 V, 2.5 V, 3.3 V |
| PLL Blocks | — | 4 |
| True-LVDS Channels | — | 8 |
| Operating Temperature Grade | — | Industrial (-40 C to +100 C case) |
| Configuration Interface | — | JTAG (IEEE 1149.1) / IEEE 1532 ISP |