EP2A70B724C9N vs EP2A40B724C9N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2A70B724C9N sa pamamagitan ng Intel at EP2A40B724C9N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2A70B724C9N | EP2A40B724C9N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | APEX II | APEX II |
| Series | EP2A70 | EP2A40 |
| Device Logic Elements | 67,200 cells | — |
| System Gates | 3,000,000 | 1,500,000 |
| Process Technology | 0.15 µm CMOS | 0.15 µm CMOS |
| Core Voltage (VCCINT) | 1.5 V nominal (1.425 V – 1.575 V) | — |
| Maximum Internal Frequency | 198 MHz | — |
| User I/O Pins | 536 | — |
| Packhaging | 724-pin FCBGA | 724-ball FCBGA (Fine-pitch Chip-Scale BGA) |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Propagation Delay | 2.87 ns | 2.05 ns |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature grade] | — |
| PLLs | 4 | — |
| Embedded Memory (ESBs) | [DATA_NEEDED: embedded memory block count] | — |
| I/O Standards | LVDS, LVTTL, LVCMOS, PCI, GTL+ (per APEX II datasheet) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | — |
| Device Type | — | FPGA (Field-Programmable Gate Array) |
| Logic Elements / Cells | — | 38,400 |
| Maximum Frequency | — | 366 MHz |
| Core Supply Voltage | — | 1.5 V |
| User I/O Count | — | 536 |
| Terminal Pitch | — | 1.270 mm |
| Number of Terminals | — | 724 |
| Terminal Form | — | Ball |
| Output Function | — | Macrocells |
| Operating Temperature Grade | — | Industrial (OTHER / per datasheet) |