EP2A70F1508C7N vs EP2A70F1508I8 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2A70F1508C7N sa pamamagitan ng Altera at EP2A70F1508I8 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2A70F1508C7N | EP2A70F1508I8 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Device Type | Field Programmable Gate Array (FPGA) | — |
| Series | APEX II | — |
| Technology | 0.15 µm CMOS | 0.15 µm CMOS SRAM |
| Core Voltage | 1.5 V | 1.5 V |
| Logic Cells | 67,200 cells | — |
| Logic Array Blocks | 6,720 LABs | — |
| Total RAM | 1,146,880 bits | — |
| Programmable I/O | 1,060 I/O pins | — |
| Maximum Stated Frequency | 420 MHz | — |
| Gate Capacity | 3 million gates | — |
| Packhaging | 1508-pin FC-FBGA | FC-FBGA-1508 (FineLine BGA) |
| Temperature na Operasyon | 0°C to 85°C | -40 °C to +85 °C (Industrial) |
| Uri ng Pagpapasok | Surface mount | — |
| Tindminan RoHS | unknown | [DATA_NEEDED: per lot/date code] |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | unknown | — |
| Configuration Method | [DATA_NEEDED: configuration method] | — |
| Package Dimensions | [DATA_NEEDED: package dimensions] | — |
| Thermal Resistance | [DATA_NEEDED: thermal resistance] | — |
| Kuru-kuryente ng Pagbibigay | [DATA_NEEDED: supply current] | — |
| Family | — | APEX II |
| System Gates | — | 3,000,000 |
| Logic Elements (Cells) | — | 67,200 |
| Embedded System Blocks (ESBs) | — | 672 (max) |
| Embedded RAM Bits | — | 1,140,480 bits |
| Phase-Locked Loops (PLLs) | — | 4 |
| Maximum User I/O Pins | — | [DATA_NEEDED: max user I/O count per datasheet] |
| LVDS Data Rate | — | Up to 840 Mbps |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, SSTL, LVDS, LVPECL |
| Configuration Mode | — | Passive Serial, Passive Parallel, JTAG |
| Level ng MSL | — | 3 |
| Peak Reflow Temperature | — | 220 °C |