EP2AGX190FF35I3G vs EP2AGX190FF35I5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2AGX190FF35I3G sa pamamagitan ng Altera at EP2AGX190FF35I5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP2AGX190FF35I3G - Arria II GX FPGA 190K LE | Intel | Altera
EP2AGX190FF35I3G ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP2AGX190FF35I3G | EP2AGX190FF35I5N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Aktibo |
| Family | Arria II GX | — |
| Logic Elements (LE) | 181,165 | — |
| Adaptive Logic Modules (ALM) | [DATA_NEEDED: ALM count] | — |
| User I/O Pins | 612 | — |
| Embedded Memory (bits) | 10,177,536 | — |
| Number of I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Transceivers | 8 high-speed transceiver channels (multi-gigabit) | — |
| Embedded Multipliers | [DATA_NEEDED: 18x18 multiplier count] | — |
| PLLs | [DATA_NEEDED: PLL count] | Up to 8 |
| Core Voltage | 0.9 V | — |
| I/O Voltage Standards | 1.2 V to 3.3 V (LVTTL, LVCMOS, LVDS, HSTL, SSTL) | — |
| Process Node | 40 nm | — |
| Temperature na Operasyon | -40 °C to +100 °C (industrial, suffix I) | -40C to +100C (Industrial) |
| Speed Grade | 3 | — |
| Packhaging | 1152-ball FC-FBGA (FF35), 35 mm body | — |
| Ball Pitch | [DATA_NEEDED: 1.0 mm (typical for FF35)] | — |
| Uri ng Pagpapasok | Surface Mount (flip-chip BGA) | — |
| Tindminan RoHS | Compliant (suffix G) | Compliant |
| Lead-Free | Yes | — |
| Programming Toolchain | Quartus II / Quartus Prime | — |
| Device Family | — | Arria II GX |
| Logic Elements | — | 181165 |
| Adaptive Logic Modules (ALMs) | — | 7612 |
| User I/Os | — | 612 |
| Embedded Memory (Kbits) | — | 10177.536 |
| Number of Transceivers | — | Up to 16 |
| Transceiver Data Rate | — | Up to 3.75 Gbps |
| Core Supply Voltage | — | 0.9 V |
| Process Technology | — | 40 nm |
| Package Type | — | 1152-ball FC-FBGA (FF35) |
| Pin/Pitch Configuration | — | [DATA_NEEDED: ball pitch and pin map] |
| Hard Memory Controllers | — | Yes |
| Hard PCI Express Blocks | — | Yes (Gen1) |
| Embedded Multipliers (18x18) | — | [DATA_NEEDED: count] |