EP2AGX65CU17I5G vs EP2AGX65CU17C5G Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2AGX65CU17I5G sa pamamagitan ng Intel at EP2AGX65CU17C5G sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2AGX65CU17I5G | EP2AGX65CU17C5G |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Unknown | Aktibo |
| Device Type | Field Programmable Gate Array (FPGA) | — |
| Product Family | Arria II GX | — |
| Logic Elements | 60,214 | 60214 |
| Programmable Logic Bits | 5,371,904 | — |
| User I/O Count | 156 | 156 |
| Packhaging | 358-ball LFBGA, FCBGA | 358-LFBGA, FCBGA (UBGA), 17x17 mm |
| Number of Terminals | 358 | — |
| Terminal Form | Ball | — |
| Package Code | LFBGA | — |
| Package Shape | Square | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Logic Cell Count | 60,214 | — |
| I/O Count | 156 | — |
| Tindminan RoHS | Compliant | Compliant |
| Lead Free Status | Not stated in verified data | — |
| Hanay ng Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | — |
| Core Voltage | [DATA_NEEDED: core voltage] | — |
| I/O Voltage Support | [DATA_NEEDED: I/O voltage support] | — |
| Transceiver Count | [DATA_NEEDED: transceiver count] | — |
| Maximum Transceiver Data Rate | [DATA_NEEDED: maximum transceiver data rate] | — |
| Configuration Memory | [DATA_NEEDED: configuration memory] | — |
| Package Dimensions | [DATA_NEEDED: package dimensions] | — |
| Embedded Memory | [DATA_NEEDED: embedded memory] | — |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification] | — |
| Family | — | Arria II GX |
| Embedded Memory Bits | — | 5371904 bits |
| Transceivers | — | Up to 12 |
| Temperature na Operasyon | — | 0C to +85C (Commercial) |
| Speed Grade | — | 5 |
| Process Node | — | 40 nm |
| Hard Multiplier Blocks (18x18) | — | 312 |
| Adaptive Logic Modules (ALMs) | — | 8-input architecture |
| Transceiver Data Rate | — | Up to 6.375 Gbps |
| PCIe Hard IP | — | PCIe Gen1/Gen2 |