EP2AGX65DF25C6G vs EP2AGX65DF25I3N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2AGX65DF25C6G sa pamamagitan ng Altera at EP2AGX65DF25I3N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP2AGX65DF25I3N - Arria II GX FPGA, 60K LE, 252 I/O, 572-FCBGA | Intel
EP2AGX65DF25I3N ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP2AGX65DF25C6G | EP2AGX65DF25I3N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Huling Pagbili |
| Product Type | Field Programmable Gate Array (FPGA) | — |
| FPGA Family | Arria II GX | — |
| Logic Cells | 60214 cells | — |
| Embedded Memory | 5371904 bits | — |
| User I/O | 252 I/O | — |
| Maximum Frequency | 400 MHz | — |
| Packhaging | 572-BGA, FCBGA | 572-ball FCBGA (flip-chip BGA) |
| Package Ball Count | 572 balls | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Manufacturer | Altera | — |
| Product Category | FPGA - Field Programmable Gate Array | — |
| Tindminan RoHS | RoHS Compliant | Compliant |
| Configuration Technology | SRAM-based FPGA | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature] | — |
| I/O Voltage Range | [DATA_NEEDED: I/O voltage range] | — |
| Core Voltage | [DATA_NEEDED: core voltage] | 0.9 V |
| Configuration Interface | [DATA_NEEDED: configuration interface] | — |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification] | — |
| Family | — | Arria II GX |
| Logic Elements | — | 60,214 |
| Logic Array Blocks (LABs) | — | 2,530 |
| Total Embedded Memory | — | 2,531 Kbits |
| M9K Memory Blocks | — | 4.4 Mbits (approx 488 blocks) |
| MLAB Memory | — | 1.4 Mbits |
| Embedded Multipliers (18x18) | — | [DATA_NEEDED: 18x18 multiplier count] |
| Transceivers | — | 8 channels |
| Max Transceiver Data Rate | — | 6.375 Gbps |
| User I/O Count | — | 252 |
| Process Technology | — | 40 nm TSMC |
| Operating Temperature Grade | — | Industrial (-40C to +100C ambient) |
| Configuration Modes | — | AS, PS, FPP, JTAG |
| Hard IP for PCIe | — | PCIe Gen1 / Gen2 (x1/x2/x4) |
| Lead-Free | — | Yes |