EP2AGX95DF25I3G vs EP2AGX95DF25I5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2AGX95DF25I3G sa pamamagitan ng Intel at EP2AGX95DF25I5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2AGX95DF25I3G | EP2AGX95DF25I5N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | NRND |
| Family | Arria II GX | Arria II GX |
| Logic Elements | 89,178 | 89,178 |
| Embedded Memory Bits | 6,839,296 | — |
| User I/O Count | 260 | — |
| Packhaging | 572-ball FCBGA | 572-ball FCBGA (DF25), 25x25 mm |
| Speed Grade | I3 | — |
| Temperature Grade | Industrial | — |
| Temperature na Operasyon | -40C to +100C | — |
| Uri ng Pagpapasok | Surface Mount (Flip-Chip BGA) | Surface Mount |
| Tindminan RoHS | Compliant | RoHS Compliant |
| Lead-Free | Yes | — |
| Level ng MSL | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL level] |
| Transceiver Count | [DATA_NEEDED: transceiver count per speed grade] | — |
| Maximum User I/O Voltage | [DATA_NEEDED: I/O bank supply range] | — |
| Configuration Method | Serial/Parallel via Altera Quartus II | — |
| Logic Array Blocks (LABs) | — | 3,747 |
| Embedded Memory (M9K blocks) | — | 4,486 Kbits |
| Maximum User I/O | — | 260 |
| Total Transceiver Channels | — | [DATA_NEEDED: transceiver channels] |
| Maximum Transceiver Data Rate | — | [DATA_NEEDED: transceiver data rate] |
| Process Node | — | 40 nm |
| Core Voltage | — | 0.9 V |
| Maximum Internal Clock Frequency | — | 500 MHz |
| Operating Temperature Grade | — | Industrial (-40C to +100C) |
| Lead Free Status | — | Lead Free |
| Design Software | — | Quartus II (legacy) |