EP2AGX95EF35C6G vs EP2AGX95EF35C4G Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2AGX95EF35C6G sa pamamagitan ng Intel at EP2AGX95EF35C4G sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2AGX95EF35C6G | EP2AGX95EF35C4G |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Device Type | Field Programmable Gate Array (FPGA) | — |
| Product Family | Arria II GX | — |
| Logic Elements | 89,178 | — |
| Embedded Memory | 6,839,296 bits | — |
| User I/O | 452 | — |
| Packhaging | 1152-BBGA, FCBGA | 1152-ball FCBGA, 35 mm x 35 mm, 1.0 mm pitch |
| Package Type | Ball Grid Array | — |
| Manufacturer | Altera / Intel | — |
| Core Voltage | [DATA_NEEDED: core voltage] | 0.9 V nominal |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature] | 0C to +85C (commercial) |
| Maksimum na Taktiko ng Oras | [DATA_NEEDED: maximum clock frequency] | — |
| Transceiver Count | [DATA_NEEDED: transceiver count] | — |
| Transceiver Data Rate | [DATA_NEEDED: transceiver data rate] | — |
| Power Dissipation | [DATA_NEEDED: power dissipation] | — |
| Package Dimensions | [DATA_NEEDED: package dimensions] | — |
| Ball Pitch | [DATA_NEEDED: ball pitch] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| REACH Status | [DATA_NEEDED: REACH status] | — |
| Family | — | Arria II GX |
| Logic Elements (LE) | — | 89,178 |
| Adaptive Logic Modules (ALM) | — | [DATA_NEEDED: ALM count from datasheet] |
| Embedded Memory Bits | — | 6,839,296 bits (~6.5 Mbit) |
| Embedded Memory Blocks (M9K/M144K) | — | [DATA_NEEDED: block count from datasheet] |
| Embedded 18x18 Multipliers | — | 616 |
| User I/Os | — | 452 |
| Transceiver Blocks | — | 4 (up to 3.75 Gbps) |
| PCIe Hard IP | — | Gen1/Gen2 (x1/x2/x4) |
| PLLs | — | 4 |
| Global Clock Networks | — | [DATA_NEEDED: per Arria II family datasheet] |
| Process Technology | — | 40 nm TSMC low-power |
| Speed Grade | — | -4 (mid-speed) |
| Configuration Mode | — | Passive Serial, Fast Passive Parallel, JTAG |