EP2AGZ225FF35C3G vs EP2AGZ300FF35C3N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2AGZ225FF35C3G sa pamamagitan ng Altera at EP2AGZ300FF35C3N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2AGZ225FF35C3G | EP2AGZ300FF35C3N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | NRND |
| Family | Arria II GZ | Arria II GZ |
| Series | Arria II | — |
| Logic Elements (LE) | 225,000 | 298,000 |
| Packhaging | 1152-ball Flip-Chip BGA (FF35) | 1152-ball FCBGA (FF35) |
| Package Size | 35 mm x 35 mm | — |
| Temperature na Operasyon | 0C to +85C (Commercial) | — |
| Speed Grade | C3 | — |
| Transceivers | Up to 16 channels | Up to 16 channels |
| Transceiver Data Rate (max) | 6.375 Gbps | — |
| DSP Blocks | [DATA_NEEDED: count] | — |
| Embedded Memory | [DATA_NEEDED: Mbits] | — |
| User I/O Banks | [DATA_NEEDED: count] | — |
| Maximum User I/O | [DATA_NEEDED: pin count] | — |
| Process Technology | 40 nm TSMC | 40 nm |
| Memory Controller Support | DDR3, DDR2, QDR II+ | — |
| PCI Express Hard IP | Yes (Gen1/Gen2) | — |
| Tindminan RoHS | Compliant | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Level ng MSL | 3 (per JEDEC J-STD-020) | — |
| Lead-Free | Yes | — |
| Logic Array Blocks (LABs) | — | 11,920 |
| Embedded Memory (Bits) | — | 18,854,912 |
| User I/Os | — | 554 |
| Maximum User I/O Pins (Package) | — | 1,152 |
| 18x18 Multipliers | — | 554 |
| Max Transceiver Data Rate | — | 6.375 Gbps |
| Core Voltage | — | 0.9 V |
| PLLs | — | 8 |
| Operating Temperature Grade | — | Commercial |