EP2AGZ300FF35C4N vs EP2AGZ300FF35I4N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2AGZ300FF35C4N sa pamamagitan ng Altera at EP2AGZ300FF35I4N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2AGZ300FF35C4N | EP2AGZ300FF35I4N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Aktibo |
| Series | Arria II GZ | Arria II GZ |
| Logic Elements | 298,000 | 298,000 |
| Logic Array Blocks (LABs) | 11,920 | — |
| Embedded Memory (bits) | 18,854,912 (~17.9 Mbit) | — |
| User I/O Count | 554 | — |
| Number of I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Process Technology | 40 nm | 40 nm |
| Core Voltage | 0.9 V | — |
| Package Type | 1152-BBGA, FCBGA (flip-chip) | 1152-BBGA, FCBGA |
| Terminal Form | Ball | — |
| Package Code (JEDEC) | HBGA | — |
| Operating Temperature Grade | Commercial (C4 = 0C to +85C) | — |
| Configuration Memory | SRAM-based (volatile, requires boot device) | — |
| Transceivers | Multi-gigabit transceivers integrated | — |
| DSP Blocks | [DATA_NEEDED: number of DSP blocks] | — |
| PLLs | [DATA_NEEDED: PLL count] | — |
| Tindminan RoHS | Compliant (per Besenchips / DigiKey listing) | Compliant |
| Lead-Free Status | Lead free (per Besenchips listing) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Maximum Operating Frequency | 500 MHz | — |
| Family | — | Field Programmable Gate Array (FPGA) |
| Number of LABs/CLBs | — | 11,920 |
| Total RAM Bits | — | 18,854,912 bits |
| Number of I/O | — | 554 |
| Supply Voltage Core | — | 0.9 V |
| Temperature na Operasyon | — | -40C to +100C (Industrial) |
| Package Dimensions | — | 35 mm x 35 mm |
| Supplier Device Package | — | 1152-FBGA (35x35) |
| Lead-Free | — | Yes |