EP2AGZ300FF35I3G vs EP2AGZ350FF35C3G Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2AGZ300FF35I3G sa pamamagitan ng Intel at EP2AGZ350FF35C3G sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2AGZ300FF35I3G | EP2AGZ350FF35C3G |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | Arria II GZ | Arria II GZ |
| Logic Elements (LE) | 300000 | 350,000 |
| Number of User I/O | 554 (maximum) | — |
| Number of Transceivers | 8 | — |
| Transceiver Data Rate | Up to 6.375 Gbps | up to 6.375 Gbps |
| Process Node | 40 nm | 40 nm TSMC |
| Temperature na Operasyon | -40C to +100 C (I3 industrial) | 0C to +85C (commercial) |
| Packhaging | 1152-ball FBGA (FF35) | 1152-FBGA (35 mm x 35 mm, 1.0 mm pitch) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Volte ng Pagbibigay | [DATA_NEEDED: core and I/O supply voltage values] | — |
| Embedded Memory (Mbits) | 16.4 | — |
| DSP Blocks | [DATA_NEEDED: number of DSP blocks] | — |
| PLLs | [DATA_NEEDED: number of PLLs] | 8 |
| Memory Interfaces | DDR3, QDRII+, RLDRAM II | — |
| Configuration Method | Serial, Parallel, JTAG | — |
| Tindminan RoHS | Compliant | Compliant |
| Level ng MSL | 3 (168 hours) | — |
| Lead-Free | Yes | — |
| Embedded Memory | — | 16,860 Kbits |
| DSP Blocks (18x18 Multipliers) | — | 224 |
| Transceivers | — | 8 |
| User I/O Pins | — | 554 |
| Hard Memory Controllers | — | 2 |
| Memory Interface Support | — | DDR3, DDR2, QDR II+, RLDRAM II |
| Maximum Memory Clock | — | 800 MHz |
| Core Voltage | — | 0.9 V |
| Configuration Modes | — | Passive Serial, Fast Passive Parallel, JTAG, AS |