EP2AGZ300HF40C4N vs EP2AGZ300HF40C3G Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2AGZ300HF40C4N sa pamamagitan ng Intel at EP2AGZ300HF40C3G sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2AGZ300HF40C4N | EP2AGZ300HF40C3G |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Manufacturer | Intel (formerly Altera) | Intel (formerly Altera) |
| Series | Arria II GZ | Arria II GZ |
| Logic Elements (LE) | 298,000 | 300,000 |
| Embedded Memory (bits) | 18,854,912 (~18.5 Mbit) | — |
| Number of LABs/CLBs | 1,194 | — |
| User I/O Count | 734 | 734 |
| Package Type | 1517-BBGA, FCBGA (Flip-Chip BGA) | — |
| Package Code | HBGA | — |
| Terminal Form | Ball | — |
| Terminal Pitch | [DATA_NEEDED: terminal pitch mm] | — |
| Operating Temperature Grade | Commercial (C4) | — |
| Process Node | 40 nm TSMC low-power | — |
| Supply Voltage (Core) | 0.9 V (typical) | — |
| Transceiver Speed (max) | 6.375 Gbps | — |
| Number of Transceivers | Up to 28 (variant-dependent) | — |
| PLL Count | 12 | — |
| Hard PCIe Gen2 IP | Yes (x1/x2/x4/x8) | — |
| DDR3 Memory Controller Hard PHY | Yes | — |
| LVDS Support | Up to 1.4 Gbps | — |
| Design Software | Quartus II (13.0+ for Arria II GZ) | — |
| Tindminan RoHS | Compliant | Pb-free finish - compliant |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Packhaging | — | 1517-ball FBGA |
| Speed Grade | — | C3 (commercial) |
| Lead Finish | — | Pb-free (G suffix) |
| Temperature na Operasyon | — | Commercial (0C to +85C) |
| Embedded Memory | — | Approx. 18.7 Mbits |
| DSP Blocks | — | 800+ (18x18 multipliers) |
| Multi-Gigabit Transceivers | — | 24 (up to 6.375 Gbps) |
| PLLs | — | 8 |
| Hard Memory Controllers | — | DDR3, QDRII+, RLDRAM II |
| PCIe Hard IP | — | PCIe Gen2 (x1/x4/x8) |
| Process Technology | — | 40 nm TSMC |
| Configuration Method | — | Serial/Parallel, partial reconfiguration supported |