EP2AGZ300HF40C4N vs EP2AGZ300HF40I4N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2AGZ300HF40C4N sa pamamagitan ng Intel at EP2AGZ300HF40I4N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2AGZ300HF40C4N | EP2AGZ300HF40I4N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Manufacturer | Intel (formerly Altera) | — |
| Series | Arria II GZ | Arria II GZ |
| Logic Elements (LE) | 298,000 | — |
| Embedded Memory (bits) | 18,854,912 (~18.5 Mbit) | — |
| Number of LABs/CLBs | 1,194 | 11920 |
| User I/O Count | 734 | — |
| Package Type | 1517-BBGA, FCBGA (Flip-Chip BGA) | — |
| Package Code | HBGA | HBGA |
| Terminal Form | Ball | BALL |
| Terminal Pitch | [DATA_NEEDED: terminal pitch mm] | — |
| Operating Temperature Grade | Commercial (C4) | — |
| Process Node | 40 nm TSMC low-power | — |
| Supply Voltage (Core) | 0.9 V (typical) | — |
| Transceiver Speed (max) | 6.375 Gbps | — |
| Number of Transceivers | Up to 28 (variant-dependent) | — |
| PLL Count | 12 | — |
| Hard PCIe Gen2 IP | Yes (x1/x2/x4/x8) | — |
| DDR3 Memory Controller Hard PHY | Yes | — |
| LVDS Support | Up to 1.4 Gbps | — |
| Design Software | Quartus II (13.0+ for Arria II GZ) | — |
| Tindminan RoHS | Compliant | Lead free / RoHS Compliant |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Number of Logic Elements/Cells | — | 298000 |
| Total RAM Bits | — | 18854912 |
| Number of User I/O | — | 734 |
| Packhaging / Kaso | — | 1517-BBGA, FCBGA |
| Number of Terminals | — | 1517 |
| Package Shape | — | SQUARE |
| Temperature na Operasyon | — | Industrial temperature grade (exact range: [DATA_NEEDED: exact industrial operating temperature range]) |
| Speed Grade | — | 4 (from MPN suffix I4; exact fMAX tables [DATA_NEEDED: speed-grade timing]) |
| Core Supply Voltage | — | [DATA_NEEDED: VCCINT core voltage] |