EP2AGZ350FF35C3G vs EP2AGZ225FF35C3G Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2AGZ350FF35C3G sa pamamagitan ng Altera at EP2AGZ225FF35C3G sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2AGZ350FF35C3G | EP2AGZ225FF35C3G |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | Arria II GZ | Arria II GZ |
| Logic Elements (LE) | 350,000 | 225,000 |
| Embedded Memory | 16,860 Kbits | [DATA_NEEDED: Mbits] |
| DSP Blocks (18x18 Multipliers) | 224 | — |
| Transceivers | 8 | Up to 16 channels |
| Transceiver Data Rate | up to 6.375 Gbps | — |
| User I/O Pins | 554 | — |
| PLLs | 8 | — |
| Hard Memory Controllers | 2 | — |
| Memory Interface Support | DDR3, DDR2, QDR II+, RLDRAM II | — |
| Maximum Memory Clock | 800 MHz | — |
| Process Node | 40 nm TSMC | — |
| Packhaging | 1152-FBGA (35 mm x 35 mm, 1.0 mm pitch) | 1152-ball Flip-Chip BGA (FF35) |
| Temperature na Operasyon | 0C to +85C (commercial) | 0C to +85C (Commercial) |
| Core Voltage | 0.9 V | — |
| Configuration Modes | Passive Serial, Fast Passive Parallel, JTAG, AS | — |
| Tindminan RoHS | Compliant | Compliant |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Series | — | Arria II |
| Package Size | — | 35 mm x 35 mm |
| Speed Grade | — | C3 |
| Transceiver Data Rate (max) | — | 6.375 Gbps |
| DSP Blocks | — | [DATA_NEEDED: count] |
| User I/O Banks | — | [DATA_NEEDED: count] |
| Maximum User I/O | — | [DATA_NEEDED: pin count] |
| Process Technology | — | 40 nm TSMC |
| Memory Controller Support | — | DDR3, DDR2, QDR II+ |
| PCI Express Hard IP | — | Yes (Gen1/Gen2) |
| Level ng MSL | — | 3 (per JEDEC J-STD-020) |
| Lead-Free | — | Yes |