EP2C35F484C7 vs EP2C35F484C6N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2C35F484C7 sa pamamagitan ng Intel at EP2C35F484C6N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2C35F484C7 | EP2C35F484C6N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | NRND |
| Series | Cyclone II | — |
| Manufacturer | Intel (formerly Altera) | Altera (now Intel FPGA) |
| Logic Elements | 33,216 LE | 33,216 |
| Total Memory Bits | 483,840 bits | — |
| Number of Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | — |
| Embedded Multipliers (18x18) | 35 | — |
| Maximum User I/O | 322 | — |
| Number of PLLs | 4 | 4 |
| Global Clock Networks | 16 | — |
| Process Technology | 90 nm CMOS, 1.2 V core | 90 nm CMOS |
| Core Voltage | 1.2 V | 1.2 V |
| Temperature na Operasyon | 0 C to 85 C (Commercial) | 0 C to 85 C |
| Packhaging | 484-pin FBGA (FineLine BGA) | 484-FBGA (F484) 1.0 mm pitch |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Configuration Modes | JTAG, Passive Serial (PS), Active Serial (AS) | Passive Serial / Active Serial / JTAG |
| I/O Standards | LVDS, LVTTL, LVCMOS, SSTL, HSTL | — |
| External Memory Support | DDR, DDR2, QDRII SRAM | — |
| Lead-Free / RoHS | Lead-Free (per 'N' suffix not present; C7 = commercial temp) | — |
| Family | — | Cyclone II |
| Total RAM Bits | — | 483,840 |
| Number of M4K RAM Blocks | — | 105 |
| Embedded 18x18 Multipliers | — | 35 |
| User I/O Count | — | 322 |
| I/O Voltage | — | 3.3 V |
| Speed Grade | — | C6 (commercial, -6) |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |
| Tindminan RoHS | — | Compliant (lead-free) |