EP2C35F484C7 vs EP2C35F484C7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2C35F484C7 sa pamamagitan ng Intel at EP2C35F484C7N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2C35F484C7 | EP2C35F484C7N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Series | Cyclone II | — |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements | 33,216 LE | — |
| Total Memory Bits | 483,840 bits | 483,840 bits |
| Number of Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | — |
| Embedded Multipliers (18x18) | 35 | — |
| Maximum User I/O | 322 | — |
| Number of PLLs | 4 | — |
| Global Clock Networks | 16 | 16 |
| Process Technology | 90 nm CMOS, 1.2 V core | 90 nm CMOS, SRAM-based |
| Core Voltage | 1.2 V | — |
| Temperature na Operasyon | 0 C to 85 C (Commercial) | 0C to +85C (commercial, 'C7' suffix) |
| Packhaging | 484-pin FBGA (FineLine BGA) | 484-ball FBGA (FineLine BGA) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Configuration Modes | JTAG, Passive Serial (PS), Active Serial (AS) | JTAG, Active Serial (AS), Passive Serial (PS), PPA |
| I/O Standards | LVDS, LVTTL, LVCMOS, SSTL, HSTL | — |
| External Memory Support | DDR, DDR2, QDRII SRAM | — |
| Lead-Free / RoHS | Lead-Free (per 'N' suffix not present; C7 = commercial temp) | — |
| Family | — | Cyclone II |
| Logic Elements (LEs) | — | 33,216 |
| Embedded Memory (M4K blocks) | — | 105 |
| Embedded 18x18 Multipliers | — | 35 |
| User I/O Pins | — | 322 |
| Core Voltage (VCCINT) | — | 1.2 V |
| I/O Bank Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (per bank) |
| PLL Count | — | 4 |
| Maximum User Frequency | — | 402 MHz (internal logic) |
| Tindminan RoHS | — | Compliant (lead-free) |