EP2C35F484C7N vs EP2C35F484C6 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2C35F484C7N sa pamamagitan ng Intel at EP2C35F484C6 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2C35F484C7N | EP2C35F484C6 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | Cyclone II | Cyclone II |
| Logic Elements (LEs) | 33,216 | — |
| Total Memory Bits | 483,840 bits | — |
| Embedded Memory (M4K blocks) | 105 | — |
| Embedded 18x18 Multipliers | 35 | 35 |
| User I/O Pins | 322 | — |
| Packhaging | 484-ball FBGA (FineLine BGA) | 484-ball FineLine BGA (FBGA) |
| Process Technology | 90 nm CMOS, SRAM-based | 90 nm low-k CMOS |
| Core Voltage (VCCINT) | 1.2 V | 1.2 V |
| I/O Bank Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (per bank) | — |
| PLL Count | 4 | — |
| Global Clock Networks | 16 | 16 |
| Maximum User Frequency | 402 MHz (internal logic) | — |
| Configuration Modes | JTAG, Active Serial (AS), Passive Serial (PS), PPA | Active Serial (AS), Passive Serial (PS), JTAG |
| Temperature na Operasyon | 0C to +85C (commercial, 'C7' suffix) | — |
| Tindminan RoHS | Compliant (lead-free) | Compliant |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Logic Elements (LE) | — | 33,216 |
| Embedded Memory Bits | — | 483,840 bits (105 M4K blocks x 4 Kbit) |
| Maximum User I/O | — | 322 |
| PLL Analog Supply (VCCA) | — | 2.5 V |
| I/O Standards | — | LVTTL, LVCMOS (1.5/1.8/2.5/3.3 V), SSTL, HSTL, PCI, differential LVDS, RSDS |
| Speed Grade | — | -6 |
| Operating Temperature (Commercial) | — | 0 C to +85 C |
| PLLs | — | 4 |
| Lead-Free | — | Yes |