EP2C35F484I8 vs EP2C35F484C7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2C35F484I8 sa pamamagitan ng Intel at EP2C35F484C7 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2C35F484I8 | EP2C35F484C7 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Unknown | Aktibo |
| Product Type | Field Programmable Gate Array (FPGA) | — |
| Logic Family | Cyclone II | — |
| Process Technology | CMOS | 90 nm CMOS, 1.2 V core |
| Logic Cells | 33216 | — |
| Logic Cells or Logic Blocks per DigiChip Snippet | 2100 | — |
| Embedded Memory | 483840 bit | — |
| User I/O Count | 322 | — |
| Volte ng Pagbibigay | 1.2 V | — |
| Maximum Frequency | 402.58 MHz | — |
| Package Pin Count | 484 | — |
| Package Type | FBGA-484 | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0 °C to 85 °C | 0 C to 85 C (Commercial) |
| Ordering Temperature Grade | Industrial grade | — |
| Packaging Format | Tray | — |
| Configuration Memory Size | [DATA_NEEDED: configuration memory size] | — |
| Embedded Multiplier Count | [DATA_NEEDED: embedded multiplier count] | — |
| PLL Count | [DATA_NEEDED: PLL count] | — |
| I/O Bank Count | [DATA_NEEDED: I/O bank count] | — |
| Package Dimensions | [DATA_NEEDED: package dimensions] | — |
| Supported I/O Standards | [DATA_NEEDED: supported I/O standards] | — |
| Tindminan RoHS | unknown | — |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | not_qualified | — |
| Series | — | Cyclone II |
| Manufacturer | — | Intel (formerly Altera) |
| Logic Elements | — | 33,216 LE |
| Total Memory Bits | — | 483,840 bits |
| Number of Logic Array Blocks (LABs) | — | [DATA_NEEDED: LAB count] |
| Embedded Multipliers (18x18) | — | 35 |
| Maximum User I/O | — | 322 |
| Number of PLLs | — | 4 |
| Global Clock Networks | — | 16 |
| Core Voltage | — | 1.2 V |
| Packhaging | — | 484-pin FBGA (FineLine BGA) |
| Configuration Modes | — | JTAG, Passive Serial (PS), Active Serial (AS) |
| I/O Standards | — | LVDS, LVTTL, LVCMOS, SSTL, HSTL |
| External Memory Support | — | DDR, DDR2, QDRII SRAM |
| Lead-Free / RoHS | — | Lead-Free (per 'N' suffix not present; C7 = commercial temp) |