EP2C35F672C8 vs EP2C35F672C8ES Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2C35F672C8 sa pamamagitan ng Altera at EP2C35F672C8ES sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2C35F672C8 | EP2C35F672C8ES |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | NRND |
| Family | Cyclone II | Cyclone II |
| Logic Elements (LEs) | 33,216 | — |
| Total RAM Bits | 483,840 | — |
| Embedded Multipliers (18x18) | 35 | — |
| User I/O Pins (max) | 475 | — |
| Number of PLLs | 4 | 4 |
| Packhaging | 672-BGA (FineLine BGA, 1.0 mm pitch) | 672-ball FBGA (FineLine BGA), 26x26 mm |
| Speed Grade | C8 (commercial, 8 ns pin-to-pin) | — |
| Process Technology | 90 nm | 90 nm CMOS |
| Core Voltage (VCCINT) | 1.15 V - 1.25 V | — |
| Operating Temperature (Commercial) | 0C to +85C | — |
| Configuration Modes | Active Serial (AS), Passive Serial (PS), JTAG | JTAG, Passive Serial, Altera Enhanced |
| Memory Interface Support | DDR, DDR2, SDR SDRAM | — |
| I/O Standards | LVTTL, LVCMOS, SSTL, LVDS, RSDS, mini-LVDS, PPDS | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Tindminan RoHS | Compliant (lead-free package) | Compliant |
| Logic Elements (LE) | — | 33,216 |
| Embedded Memory Bits | — | 483,840 bits |
| Embedded 18x18 Multipliers | — | 35 |
| Maximum User I/O Pins | — | 475 |
| Logic Cells / Logic Blocks | — | 2100 |
| Temperature na Operasyon | — | 0°C to +85°C (commercial) |
| Core Supply Voltage | — | 1.2 V |
| I/O Bank Count | — | 4 |
| Uri ng Memory | — | M4K RAM blocks (dual-port / FIFO) |