EP2C35U484C8 vs EP2C35U484C6 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2C35U484C8 sa pamamagitan ng Intel at EP2C35U484C6 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2C35U484C8 | EP2C35U484C6 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Huling Pagbili |
| Series | Cyclone II | — |
| Family Name | Cyclone II | — |
| Logic Elements / Cells | 33,216 LE | — |
| Total RAM Bits | 483,840 bits (33216 cells) | 483,840 |
| Number of I/O | 322 user I/O | — |
| Number of Logic Blocks/Elements | 2,076 logic blocks | — |
| Number of Gates | [DATA_NEEDED: equivalent gate count] | — |
| Number of PLLs | 4 | 4 |
| Embedded Multipliers | 35 (18x18) | 35 (18x18) |
| Package Type | 484-FBGA (UBGA-484), lead-free | 484-FBGA (U484, FineLine BGA) |
| Package Pin Count | 484 balls | — |
| Speed Grade | C8 (commercial, 8th tier) | C6 |
| Core Voltage | 1.15 V to 1.25 V | 1.2 V |
| Internal Frequency (max) | 500 MHz | — |
| Temperature na Operasyon | 0C to 85C (commercial) | 0C to +85C (commercial) |
| Logic Family / Process | CMOS, 90 nm | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Configuration Modes | JTAG, AS, PS, FPP | — |
| Level ng MSL | 3 (per JEDEC J-STD-020) | — |
| Tindminan RoHS | Compliant (lead-free UBGA) | [DATA_NEEDED: RoHS status] |
| Katayuan ng Lifecycle | Not Recommended for New Designs (NRND) | — |
| Family | — | Cyclone II |
| Logic Elements | — | 33,216 |
| Number of LABs/CLBs | — | 2,076 |
| User I/O Count | — | 322 |
| Process Technology | — | 90 nm CMOS |
| Package Dimensions | — | 19 mm x 19 mm |
| Ball Pitch | — | 1.0 mm |
| Configuration Interface | — | Passive Serial / Active Serial / JTAG |
| DSP Block Count | — | 35 columns |