EP2C50U484C8N vs EP2C50U484C7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2C50U484C8N sa pamamagitan ng Intel at EP2C50U484C7N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2C50U484C8N | EP2C50U484C7N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Huling Pagbili |
| Series | Cyclone II | Cyclone II |
| Family | Cyclone II (90 nm) | — |
| Logic Elements (LE) | 50,528 | — |
| Embedded Memory (M4K blocks) | 594,432 bits (129 M4K blocks) | — |
| Embedded 18x18 Multipliers | 86 | — |
| PLLs | 4 | 4 |
| User I/Os | 294 | — |
| I/O Banks | 8 | — |
| Speed Grade | C8 (commercial, mid-tier) | C7 (7 ns pin-to-pin delay) |
| Temperature na Operasyon | 0C to +85C (commercial) | 0C to 85C (commercial, C-grade) |
| Packhaging | 484-ball FBGA (UBGA-484) | 484-FBGA (UBGA-484), 1.0 mm pitch |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Process Technology | 90 nm low-k CMOS | 90 nm CMOS |
| Configuration Methods | Passive Serial, Active Serial, JTAG | — |
| Memory Interface Support | DDR, DDR2, SDR SDRAM, QDRII SRAM | — |
| Tindminan RoHS | Compliant (lead-free) | — |
| Level ng MSL | 3 (168 hours) | 3 |
| Family Name | — | Cyclone II FPGA |
| Logic Elements | — | 50,528 |
| Number of Logic Cells | — | 3,158 (per digchips) |
| Number of LABs | — | [DATA_NEEDED: LAB count] |
| Maximum System Gates | — | 594,432 |
| Number of Registers | — | 50,528 |
| Total Embedded RAM | — | 234 Kbits (M4K blocks) |
| Embedded Multipliers | — | 86 (18x18) |
| User I/O Pins | — | 294 |
| Supply Voltage Core (VCCINT) | — | 1.15 V to 1.25 V |
| Lead-Free / RoHS | — | Lead Free |