EP2C5F256C7N vs EP2C5F256C8N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2C5F256C7N sa pamamagitan ng Intel at EP2C5F256C8N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP2C5F256C8N - Cyclone II FPGA, 4.6K LEs, 158 I/O | Altera / Intel
EP2C5F256C8N ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP2C5F256C7N | EP2C5F256C8N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Huling Pagbili |
| Family | Cyclone II | Cyclone II |
| Logic Elements | 4,608 | — |
| Embedded Memory (Bits) | 119,808 | — |
| User I/O Pins | 158 | — |
| Embedded Multipliers (18x18) | 13 | — |
| PLLs | 2 | 2 |
| Process Technology | 90 nm low-k CMOS | 90 nm low-k CMOS |
| Packhaging | 256-ball FBGA (FineLine BGA) | 256-ball FineLine BGA (FBGA-256) |
| Package Dimensions | 17 mm x 17 mm, 1.0 mm ball pitch | — |
| Speed Grade | -7 | 8 (commercial) |
| Temperature na Operasyon | 0C to +85C (commercial) | 0C to +85C (commercial) |
| Core Voltage (VCCINT) | 1.2 V | — |
| I/O Bank Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (per bank) | — |
| Configuration Modes | AS, PS, JTAG | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | Compliant | Compliant (lead-free) |
| Logic Elements (LE) | — | 4,608 |
| Logic Array Blocks (LAB) | — | 288 |
| Embedded Memory (M4K blocks) | — | 119,808 bits (~14.6 Kbytes) |
| Embedded 18x18 Multipliers | — | 13 |
| Maximum User I/O Pins | — | 158 |
| Core Voltage | — | 1.2 V |
| Configuration Method | — | SRAM, JTAG (IEEE 1149.1), Passive Serial |
| Level ng MSL | — | [DATA_NEEDED: MSL level per JEDEC J-STD-020] |