EP2C8T144C8N vs EP2C8T144C6 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2C8T144C8N sa pamamagitan ng Intel at EP2C8T144C6 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2C8T144C8N | EP2C8T144C6 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | NRND |
| Family | Cyclone II | Cyclone II |
| Logic Elements (LE) | 8,256 | 8,256 |
| Configurable Logic Blocks | 516 | — |
| Embedded Memory | 165,888 bits (162 Kbit) | — |
| Embedded Multipliers (18x18) | 36 | — |
| User I/O Count | 85 | — |
| PLL Count | 2 | — |
| Core Voltage VCCINT | 1.15 V to 1.25 V (typ. 1.2 V) | — |
| I/O Voltage VCCIO | 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V (bank-based) | — |
| Process Technology | 90 nm | 90 nm CMOS |
| Max Internal Frequency | 320 MHz | — |
| Configuration Scheme | Serial / Parallel / JTAG | — |
| Temperature na Operasyon | 0C to +85C (Commercial, suffix C) | — |
| Packhaging | TQFP-144 (T144), 22x22 mm, 0.5mm pitch | 144-pin LQFP (TQFP), 22x22 mm, 0.5 mm pitch |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | 3 | — |
| Tindminan RoHS | Compliant | Non-compliant (per distributor listing) |
| Lead-Free | Yes | — |
| Configurable Logic Blocks (CLB) | — | 516 |
| Embedded Memory (bits) | — | 165,888 |
| Embedded RAM Blocks | — | 36 M4K blocks (4,608 bits each) |
| Embedded 18x18 Multipliers | — | 18 |
| PLLs | — | 4 |
| User I/O Pins (max) | — | 85 |
| Maximum User I/O (this package) | — | 85 |
| Core Voltage | — | 1.2 V (typical) |
| Speed Grade | — | 6 |
| Hanay ng Temperature na Operasyon | — | Commercial (0C to +85C) |
| Configuration Interface | — | JTAG (IEEE 1149.1), Altera AS / PS / PP |
| Design Software | — | Quartus II (v13.0 SP1 recommended) |
| Maximum Internal Frequency | — | [DATA_NEEDED: see Cyclone II device handbook for fMAX by design] |