EP2S130F1020C3NGA vs EP2S130F1020C5 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2S130F1020C3NGA sa pamamagitan ng Intel at EP2S130F1020C5 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2S130F1020C3NGA | EP2S130F1020C5 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | NRND |
| Family | Stratix II | Stratix II |
| Logic Elements (LE) | 132,540 | 132,540 |
| Logic Array Blocks (LABs) | 6,627 | — |
| Embedded Memory (TriMatrix) | 6,747,840 bits (6.7 Mbits) | — |
| Embedded DSP Blocks | Yes (18x18 multiplier blocks) | — |
| User I/Os | 742 | — |
| Process Technology | 90 nm | 90 nm CMOS, all-layer copper |
| Core Voltage | 1.2 V | 1.2 V |
| Maximum Internal Clock Frequency | 778.82 MHz | — |
| Packhaging | 1020-ball FC-FBGA | 1020-ball FC-FBGA |
| Speed Grade | C3 | 5 |
| Temperature Grade | Commercial (0C to +85C) | — |
| PLLs | 12 (8 fast PLLs + 4 enhanced PLLs) | — |
| Configuration Modes | PS, PPS, PPA, JTAG | — |
| Configuration Encryption | 128-bit AES | — |
| Tindminan RoHS | [DATA_NEEDED: rohs status] | [DATA_NEEDED: rohs status] |
| On-chip Termination (OCT) | Yes (series, parallel, dynamic) | — |
| Embedded Memory (bits) | — | 6,747,840 |
| User I/O Pins | — | 742 |
| Operating Frequency (max) | — | 609.76 MHz |
| Number of Multipliers (18x18) | — | 252 |
| Uri ng Pagpapasok | — | Surface Mount |
| Temperature na Operasyon | — | 0C to +85C (commercial) |
| I/O Standards Supported | — | LVDS, LVTTL, LVCMOS, SSTL, HSTL |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |