EP2S130F1020C4N vs EP2S130F1020I4N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2S130F1020C4N sa pamamagitan ng Intel at EP2S130F1020I4N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP2S130F1020I4N - Stratix II 132K LEs FPGA, 742 I/O | Intel / Altera
EP2S130F1020I4N ✗ Tapus ng BuhayPagsanggunian na paghahambing
| Parametro | EP2S130F1020C4N | EP2S130F1020I4N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Tapus ng Buhay |
| Family | Stratix II | Stratix II |
| Logic Elements | 132,540 | 132,540 |
| Total Memory Bits | 6,747,840 | — |
| Logic Array Blocks (LABs) | 6,627 | 6,627 |
| Maximum User I/O | 742 | — |
| Process Technology | 90 nm CMOS | — |
| Core Voltage (VCCINT) | 1.2 V | 1.15 V to 1.25 V |
| Packhaging | 1020-ball FC-FBGA | — |
| Speed Grade | C4 (commercial) | I4 (Industrial, speed bin 4) |
| Temperature na Operasyon | 0C to +85C (commercial, inferred from C grade) | -40C to +100C (TJ, Industrial) |
| Maximum Internal Frequency | 711.24 MHz | — |
| Configuration Method | JTAG / Passive Serial / Active Serial | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Level ng MSL | 3 (per JEDEC J-STD-020, typical for FC-BGA) | — |
| Tindminan RoHS | Compliant | [DATA_NEEDED: RoHS compliance status] |
| Design Tool | Quartus II (legacy, up to v13.0sp1) | — |
| Total RAM Bits | — | 6,747,840 |
| User I/O Count | — | 742 |
| Packhaging / Kaso | — | 1020-BBGA (FineLine BGA, FC-FBGA) |
| Supplier Device Package | — | 1020-FBGA |
| Process Node | — | 90 nm |
| Internal Operating Frequency | — | up to 711.24 MHz |
| Configuration | — | SRAM-based, volatile configuration memory |
| Design Software | — | Quartus II (legacy) |
| Lead-Free | — | [DATA_NEEDED: lead-free / lead-bearing finish] |