EP2S130F1020C5 vs EP2S130F1020C5N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP2S130F1020C5 sa pamamagitan ng Intel at EP2S130F1020C5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP2S130F1020C5 EP2S130F1020C5N
Brand Intel Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle NRND NRND
Family Stratix II Stratix II
Logic Elements (LE) 132,540 —
Embedded Memory (bits) 6,747,840 —
User I/O Pins 742 —
Operating Frequency (max) 609.76 MHz —
Process Technology 90 nm CMOS, all-layer copper 90 nm
Core Voltage 1.2 V —
Number of Multipliers (18x18) 252 —
Packhaging 1020-ball FC-FBGA 1020-ball FC-FBGA (33x33 mm)
Uri ng Pagpapasok Surface Mount Surface Mount
Temperature na Operasyon 0C to +85C (commercial) Commercial (0C to +85C, C5 grade)
Speed Grade 5 —
I/O Standards Supported LVDS, LVTTL, LVCMOS, SSTL, HSTL —
Tindminan RoHS [DATA_NEEDED: rohs status] [DATA_NEEDED: rohs status]
Lead-Free [DATA_NEEDED: lead-free status] [DATA_NEEDED: lead-free status]
Logic Elements — 132,540
Adaptive Logic Modules (ALMs) — 6627 LABs (per Jotrin listing)
Total Memory Bits — 6,747,840 bits
User I/Os — 734
Core Supply Voltage (VCCINT) — 1.15 V to 1.25 V
Maximum Internal Frequency — 609.76 MHz
Temperature Grade — C5 (other - per Partstack)
PLLs — 4 (typical Stratix II feature)
Global Clock Networks — 16 (typical Stratix II feature)
Configuration Method — Serial/Parallel via Quartus II (typical Stratix II)
Country of Origin — Republic of Korea (per GlobalSpec)
ECCN — 3A001.a.7.a (per GlobalSpec)
Estimated EOL Date — 2023 (per GlobalSpec)

Mga Datasheets at Resources

Tingnan ang Lahat ng mga Produkto Lumikha ng BOM Hilingin ang Kita