EP2S130F1020C5N vs EP2S130F1020I4 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2S130F1020C5N sa pamamagitan ng Intel at EP2S130F1020I4 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2S130F1020C5N | EP2S130F1020I4 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | Stratix II | Stratix II |
| Logic Elements | 132,540 | 132,540 |
| Adaptive Logic Modules (ALMs) | 6627 LABs (per Jotrin listing) | 53,016 |
| Total Memory Bits | 6,747,840 bits | — |
| User I/Os | 734 | — |
| Process Technology | 90 nm | — |
| Core Supply Voltage (VCCINT) | 1.15 V to 1.25 V | — |
| Maximum Internal Frequency | 609.76 MHz | — |
| Packhaging | 1020-ball FC-FBGA (33x33 mm) | 1020-ball FC-FBGA (33x33 mm) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (FC-FBGA) |
| Temperature na Operasyon | Commercial (0C to +85C, C5 grade) | — |
| Temperature Grade | C5 (other - per Partstack) | — |
| Tindminan RoHS | [DATA_NEEDED: rohs status] | Compliant (per distributor listings) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| PLLs | 4 (typical Stratix II feature) | — |
| Global Clock Networks | 16 (typical Stratix II feature) | — |
| Configuration Method | Serial/Parallel via Quartus II (typical Stratix II) | — |
| Country of Origin | Republic of Korea (per GlobalSpec) | — |
| ECCN | 3A001.a.7.a (per GlobalSpec) | — |
| Estimated EOL Date | 2023 (per GlobalSpec) | — |
| Equivalent LEs | — | ~180,000 |
| Embedded Memory (bits) | — | 6,747,840 |
| Embedded Memory (M512 blocks) | — | 530 |
| Embedded Memory (M4K blocks) | — | 768 |
| Embedded Memory (M-RAM blocks) | — | 4 |
| Embedded 18x18 Multipliers | — | 504 |
| DSP Blocks | — | 48 |
| User I/O Pins | — | 742 |
| User I/O Banks | — | 12 |
| Process Node | — | 90 nm CMOS, all-layer copper |
| Core Voltage (VCCINT) | — | 1.2 V |
| Speed Grade | — | I (industrial performance) |
| Device Revision | — | 4 |
| Temperature ng Junction na Operasyon | — | -40C to +100C (industrial) |
| Configuration Scheme | — | Fast Passive Parallel x8, Passive Serial, JTAG |