EP2S130F1508C3 vs EP2S130F1508C4N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2S130F1508C3 sa pamamagitan ng Intel at EP2S130F1508C4N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2S130F1508C3 | EP2S130F1508C4N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Aktibo |
| Family | Stratix II | — |
| Logic Elements | 132,540 | — |
| Adaptive Logic Modules (ALMs) | [DATA_NEEDED: ALM count] | — |
| Embedded Memory (bits) | 6,747,840 | — |
| Maximum User I/O | 1,126 | — |
| Process Technology | 90 nm | 90 nm CMOS |
| Core Voltage (typical) | 1.2 V | — |
| Speed Grade | C3 (commercial) | C4 (commercial) |
| Packhaging | 1508-ball FC-BGA | 1,508-ball FBGA |
| Temperature na Operasyon | 0C to +85C (commercial) | 0C to +85C (commercial) |
| DSP Blocks | [DATA_NEEDED: DSP block count] | — |
| Transceivers | [DATA_NEEDED: transceiver count/grade] | — |
| PLLs (Fast + Enhanced) | 8 + 4 (per family) | — |
| Configuration Modes | Passive Serial, Fast Passive Parallel, JTAG | — |
| Tindminan RoHS | Compliant | Compliant (N suffix) |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Series | — | Stratix II |
| Logic Array Blocks (LABs) | — | 6,627 |
| User I/O Pins | — | 1,126 |
| Package Code | — | BGA |
| Package Shape | — | SQUARE |
| Number of Terminals | — | 1,508 |
| Form of Terminal | — | BALL |
| Configuration | — | SRAM, field-programmable |
| Logic Architecture | — | Adaptive Logic Module (ALM) |
| Lead Free | — | Yes |