EP2S130F1508C5N vs EP2S130F1508C4 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2S130F1508C5N sa pamamagitan ng Intel at EP2S130F1508C4 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP2S130F1508C4 - 132K LE Stratix II FPGA, FCBGA-1508 | Altera / Intel
EP2S130F1508C4 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP2S130F1508C5N | EP2S130F1508C4 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Family | Stratix II | Stratix II |
| Logic Elements (LE) | 132,600 | — |
| Logic Array Blocks (LABs) | 6,627 | — |
| User I/Os | 1,126 | — |
| Packhaging | 1508-ball FC-FBGA | 1508-ball FCBGA (40 x 40 mm, 1 mm pitch) |
| Package Pin Count | 1508 | — |
| Operating Voltage (Core) | 1.2 V | — |
| Process Node | 90 nm | — |
| Speed Grade | -5 (C5) | — |
| Temperature Grade | Commercial (0C to +85C) | — |
| On-chip RAM | [DATA_NEEDED: TriMatrix RAM bits] | — |
| DSP Blocks (18x18 multipliers) | [DATA_NEEDED: DSP block count] | — |
| Transceivers | Up to 12 channels (family maximum) | — |
| Transceiver Data Rate (max) | Up to 6.375 Gbps (family spec) | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Tindminan RoHS | [DATA_NEEDED: per lot] | [DATA_NEEDED: RoHS compliance status] |
| Logic Elements (LEs) | — | 132540 |
| Configurable Logic Blocks (CLBs) | — | 53016 |
| Total Memory Bits | — | 6747840 |
| Maximum User I/O Pins | — | 1126 |
| Core Voltage | — | 1.2 V |
| Process Technology | — | 90 nm CMOS, all-layer copper SRAM |
| Maximum Internal Clock Frequency | — | 717 MHz |
| Operating Temperature Grade | — | Commercial (C4) |
| Configuration Method | — | Serial (EPCS) or JTAG |
| Level ng MSL | — | [DATA_NEEDED: MSL rating] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |