EP2S130F1508C5RB vs EP2S130F1508C3 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2S130F1508C5RB sa pamamagitan ng Intel at EP2S130F1508C3 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2S130F1508C5RB | EP2S130F1508C3 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Huling Pagbili |
| Family | Stratix II | Stratix II |
| Logic Elements | 132,600 | 132,540 |
| Logic Array Blocks (LABs) | 6,727 | — |
| User I/Os | 1,126 | — |
| Embedded Memory | 6,747 Kbits (TriMatrix: MRAM/M4K/M512) | — |
| Embedded 18x18 Multipliers | 252 (504 9x9 equivalent) | — |
| Packhaging | 1508-ball FBGA (F1508), 40x40 mm, 1.5 mm pitch | 1508-ball FC-BGA |
| Process Technology | 90 nm CMOS | 90 nm |
| Core Voltage | 1.2 V (typical) | — |
| Speed Grade | 5 (C5, commercial) | C3 (commercial) |
| Temperature na Operasyon | 0C to +85C (commercial, junction) | 0C to +85C (commercial) |
| Uri ng Pagpapasok | Surface Mount (FBGA) | Surface Mount (BGA) |
| Level ng MSL | 3 (per JEDEC J-STD-020) | [DATA_NEEDED: MSL level] |
| Tindminan RoHS | Compliant | Compliant |
| Lead-Free | Yes | — |
| Lifecycle | Not Recommended for New Designs (NRND) | — |
| Adaptive Logic Modules (ALMs) | — | [DATA_NEEDED: ALM count] |
| Embedded Memory (bits) | — | 6,747,840 |
| Maximum User I/O | — | 1,126 |
| Core Voltage (typical) | — | 1.2 V |
| DSP Blocks | — | [DATA_NEEDED: DSP block count] |
| Transceivers | — | [DATA_NEEDED: transceiver count/grade] |
| PLLs (Fast + Enhanced) | — | 8 + 4 (per family) |
| Configuration Modes | — | Passive Serial, Fast Passive Parallel, JTAG |