EP2S30F672C5 vs EP2S30F672C4 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2S30F672C5 sa pamamagitan ng Intel at EP2S30F672C4 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2S30F672C5 | EP2S30F672C4 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | Stratix II | — |
| Logic Elements | 33,880 | — |
| Logic Array Blocks (LABs) | 1,694 | — |
| Total RAM Bits | 1,369,728 | 1,369,728 |
| Embedded Multipliers (DSP blocks) | 12 DSP blocks | — |
| Maximum User I/Os | 500 | — |
| Core Voltage | 1.2 V | — |
| Maximum Operating Frequency | 609.76 MHz | — |
| Process Technology | 90 nm CMOS | 90 nm |
| Packhaging | 672-pin FC-FBGA (flip-chip) | 672-BBGA, FCBGA (27x27 mm) |
| Speed Grade | C5 (moderate-speed bin) | — |
| Operating Temperature (Commercial) | 0C to 85C junction | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Uri ng Memory | TriMatrix (M512 / M4K / M-RAM) | — |
| Tindminan RoHS | [DATA_NEEDED: confirmed RoHS compliance] | Compliant |
| Manufacturer | — | Intel (formerly Altera) |
| Series | — | Stratix II |
| Logic Elements / Cells | — | 33,880 |
| Number of I/O | — | 500 |
| Core Voltage - Supply | — | 1.15 V to 1.25 V |
| Maximum Core Frequency (datasheet benchmark) | — | 711 MHz |
| Temperature na Operasyon | — | 0C to +85C (commercial, 'C' speed grade) |
| Embedded DSP Blocks | — | 16 (Stratix II S30 tier) |
| Number of PLLs | — | [DATA_NEEDED: PLL count for S30 tier] |
| Number of Global Clock Networks | — | [DATA_NEEDED: global clock network count] |
| Lead-Free | — | Yes |