EP2S30F672I4 vs EP2S30F672C3N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2S30F672I4 sa pamamagitan ng Intel at EP2S30F672C3N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP2S30F672C3N - 33,880 LEs Stratix II FPGA, 672-FBGA | Intel / Altera
EP2S30F672C3N ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP2S30F672I4 | EP2S30F672C3N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Series | Stratix II | — |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements | 33880 | — |
| Logic Array Blocks (LABs) | 1694 | 1,694 |
| Total RAM Bits | 1369728 | — |
| Number of I/O | 500 | — |
| DSP Blocks | 12 (per datasheet, family range) | — |
| Number of PLLs | 6 | — |
| Voltage - Supply | 1.2 V core, separate I/O bank VCCIO | — |
| Temperature na Operasyon | -40C to +100C (Industrial) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Packhaging / Kaso | 672-BBGA, FCBGA (FBGA-672) | — |
| Package Dimensions | 35 x 35 mm | — |
| Ball Pitch | 1.0 mm | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Configuration | JTAG, serial, parallel (Stratix II scheme) | — |
| Level ng MSL | 3 (per JEDEC J-STD-020) | — |
| Tindminan RoHS | [DATA_NEEDED: confirm RoHS compliance on part label] | Compliant |
| Family | — | Stratix II |
| Number of Logic Elements (LEs) | — | 33,880 |
| Embedded Memory (Bits) | — | 1,369,728 |
| Embedded Memory (Kbits) | — | 500 Kbits |
| Number of I/Os | — | 500 |
| Bilang ng Outputs | — | 492 |
| Core Voltage | — | 1.2 V |
| Maximum Internal Frequency | — | 816.99 MHz (per published spec) |
| Packhaging | — | 672-ball FineLine BGA (FC-FBGA) |
| Operating Temperature Grade | — | Commercial ("C") |
| Speed Grade | — | 3 |
| Lead-Free / RoHS | — | Pb-free (suffix "N") |