EP2S30F672I4 vs EP2S30F672C5NGC Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2S30F672I4 sa pamamagitan ng Intel at EP2S30F672C5NGC sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2S30F672I4 | EP2S30F672C5NGC |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | Stratix II | — |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements | 33880 | 33,880 |
| Logic Array Blocks (LABs) | 1694 | — |
| Total RAM Bits | 1369728 | 1,369,728 |
| Number of I/O | 500 | — |
| DSP Blocks | 12 (per datasheet, family range) | — |
| Number of PLLs | 6 | — |
| Voltage - Supply | 1.2 V core, separate I/O bank VCCIO | — |
| Temperature na Operasyon | -40C to +100C (Industrial) | Commercial (0C to +85C) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Packhaging / Kaso | 672-BBGA, FCBGA (FBGA-672) | — |
| Package Dimensions | 35 x 35 mm | — |
| Ball Pitch | 1.0 mm | — |
| Process Technology | 90 nm CMOS | 90 nm |
| Configuration | JTAG, serial, parallel (Stratix II scheme) | — |
| Level ng MSL | 3 (per JEDEC J-STD-020) | — |
| Tindminan RoHS | [DATA_NEEDED: confirm RoHS compliance on part label] | — |
| Family | — | Stratix II |
| Adaptive Logic Modules (ALMs) | — | [DATA_NEEDED: ALM count] |
| Embedded RAM (Kbits) | — | 1,337.6 Kbits |
| Hardware Multipliers (18x18) | — | 64 |
| Maximum User I/Os | — | 500 |
| User I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Core Supply Voltage | — | 1.2 V |
| Internal Performance | — | Up to 609.76 MHz |
| Packhaging | — | 672-ball FC-FBGA |
| Speed Grade | — | C5 |
| Programmable Interface | — | PCI-X 32/64-bit, 66/100/133 MHz master/target |
| Lead-Free / RoHS | — | [DATA_NEEDED: lead-free status] |